Qualifications PHD or Masters degree in Electrical Engineering, or a related field 10+ years of experience in the design, development, and test of high-performance analog and mixed signal ICs Strong proficiency in Synopsys custom design family tools,
In this role, you will be responsible for the Physical Implementation of high speed interface IPs and test-chips, driving all aspects from RTL to GDS including timing and physical sign-off. You will work in close interaction
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of
Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate
Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate
As a ASIC Physical Implementation, Principal Engineer, the successful candidate will work on a variety of advanced SERDES developments including the latest 56/112/224G standards. The digital implementation organization is seeking a motivated person responsible for the physical
As a ASIC Physical Implementation, Sr Staff Engineer, the successful candidate will work on a variety of advanced SERDES developments including the latest 56/112/224G standards. The digital implementation organization is seeking a motivated person responsible for the
Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate
time type Full time posted on Posted 30+ Days Ago job requisition id R4925-23 Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works
ASIC Architecture, Digital Design or Digital Verification or Firmware development Responsibilities Architecting, Designing and Verifying high speed mixed-signal PHYs like PCIe, Ethernet, USB Roles available in all these areas - working on new variants of these protocols. Key Requirements
ASIC Physical Design Methodology Engineer. We are looking for an ASIC Physical Design Methodology Engineer to join the Digital Methodology Core Team. In this position, you will design, develop, and manage infrastructures, processes, methodologies, and checklists for
Analog and Mixed Signal Design Engineer, Staff Join us as an analog and mixed-signal design engineer in the PLL design team. Our designs enable the next generation of datacenters, automobiles and communications networks. You will work on system-level
Staff Design Engineer The “R&D Professional” team has broad understanding in mixed-signal design, implementation, firmware and verification. The team has experience in both back-end and front-end ASIC development flows with a mandate to provide targeted support to
Principal Digital Engineer Seeking a highly motivated and innovative experienced Digital Design Engineer with knowledge of ASIC development flow. The candidate will be working as part of a highly experienced mixed-signal design and verification team, targeting next generation of
time type Full time posted on Posted Yesterday job requisition id R4925-23 Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the
Hardware Design Engineer with Lab Eval Experience Salary: Very Attractive Rate Location: N/A Full Time Hardware Design EngineerExperience Required:The candidate should have experience in some or all of the following areas: Low-power circuit design, DC/DC converters,
Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate
Experience level: Mid-senior Experience required: 1 Years Education level: Bachelor’s degree Job function: Information Technology Industry: Semiconductors Compensation: View salary Total position: 1 Relocation assistance: Yes Job Overview: headquartered in San Jose, CA, is an industry
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of
About this opening: This is an unparalleled opportunity to lead and grow Ethernovia Canada’s R&D center. As VLSI Director, you will technically lead cutting-edge projects and make a lasting impact on the future of mobility while