Job Title Debug Sub-System & Design-for-Test (DFT) Engineer Summary We are seeking a Debug Sub-System / DFT Engineer to architect, implement, and validate the on-chip debug and test infrastructure for complex SoC and ASIC designs. This
Job Title SoC Validation Engineer — Pre-Silicon & Post-Silicon Summary We are looking for an experienced SoC Validation Engineer to drive end-to-end validation of complex System-on-Chip (SoC) designs across both pre-silicon and post-silicon phases. The ideal
Job Title Emulation Build Engineer Summary We are seeking an Emulation Build Engineer to own the end-to-end process of building, compiling, and validating RTL design models targeting hardware emulation and prototyping platforms — specifically Cadence Palladium
Role: MuleSoft Integration Architect - SFDC Integration Patient Services Hub Transformation (Life Sciences Cloud) Location: Canada Remote We are seeking a hands-on MuleSoft Integration Architect to lead the integration architecture for a large-scale Patient Services Hub