Title: RTL design Engineer 5 Contract: 6 months Extendable Location: Markham, ON (Hybrid) Pay Rate: ($75-$80)/hr T4 JOB DUTIES: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip
2 days ago Be among the first 25 applicants This range is provided by Net2Source (N2S). Your actual pay will be based on your skills and experience — talk with your recruiter to learn more. Base pay range
Step into the role of Systems Test Validation Engineer and drive excellence in system integration plans and debugging. Collaborate with key teams to ensure zero quality escapes in our products. In this influential position, you will
A leading workforce solutions provider in Markham, ON, is seeking a UFS IP Validation Engineer. This role involves validation of external UFS storage devices, requiring a strong background in hardware IP, SoC architecture, and excellent problem-solving
We are looking for a dynamic, energetic Systems Test Validation Engineer to join our growing team. In this role, you will have the opportunity to work on the development of methodologies, the execution of system integration
Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specifications for new and modified functions. Responsible for linting and simulation of design. Work
Title: Design Engineer Location: Remote Duration: Minimum 6-Month Contract Pay Range: $50 to $57 per hour on T4 JOB DUTIES: Design and verify standard cell schematics. Port schematics into new technologies. Create new schematics for new
Title: DV Engineer with AI workflow Location: Markham, ON location people are preferred but remote is fine Duration : 6 months with possible extension and conversion to FTE Pay range: $55/hr to $65/hr on T4 Overview