Job Title: Lead Verification Engineer Location: Montreal, Ottawa, Toronto Overview This is an opportunity to join a dynamic and growing team of experienced engineers developing high-performance physical IP for industry-standard protocols. The successful candidate will be
Co‑Op – Analog/ Mixed‑Signal IC Design The co‑op student will be given the responsibility of utilizing and learning analog/mixed‑signal IC design and simulation techniques to investigate selected topics of interest. The exercise will involve working with
Advance your engineering expertise as an Analog/Mixed-Signal IC Design Intern with Cadence, focusing on design simulations and subsystem investigations. In this co-op role, you will tackle circuit design challenges related to analog front-end systems, clock distribution,