As the global leader in high-speed connectivity, Ciena builds the critical infrastructure powering the AI era. We’re a technology company shaping the future of networking, guided by innovation, integrity, and collaboration. Through development opportunities, meaningful work,
At BuildOps, we’re building a groundbreaking software solution, purpose-built to support today’s commercial contractors. From helping our customers to manage their service all the way to project management, we’re breaking the mold and building a team
AI-Augmented Design Flows · CI/CD for RTL · Lint / CDC / Synthesis Automation ABOUT THE ROLE Eliyan is the chiplet interconnect pioneer behind NuLink, the industrys most efficient chiplet-to-chiplet PHY technology. With Series C funding
Role Overview We are seeking a Physical Design Engineer with a strong foundation in Static Timing Analysis (STA) and a focus on design flow automation. In this role, you will be responsible for driving timing closure across
We are partnered with a staffing and recruitment firm that specializes exclusively in cybersecurity, data, and AI roles. Their clients are enterprise organizations generating $1B or more in annual revenue, with a roster of well-recognized names
Sr. Staff Physical Design Timing Engineer (STA) Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world’s first 3D-stacked photonics engine, Passage, capable of
Lightmatter, Inc. in Toronto seeks a Sr. Staff Physical Design Timing Engineer to lead backend digital execution for photonics CMOS technologies. You will work with a world-class team to define optimization strategies and push timing closure
TORONTO 02 MOUNT-ROYAL (Montreal) Full time R53457 At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. The candidate will have the opportunity to work on
| DESCRIPTION | Programme: AEC - Intégration à la profession infirmière au Québec (CWA.00) #8 Bloc 7 Cours: 180-F94-VM Stage chirurgie II - Tâche Gr8-F94-StA-CHIR - 75 heures - Jour/Soir – Saint-Eustache - Groupe 5577 Taux horaire:
| DESCRIPTION | Programme: AEC - Intégration à la profession infirmière au Québec (CWA.00) #8 Bloc 7 Cours: 180-F94-VM Stage médecine - Tâche Gr8-F94-StA-MÉD - 75 heures - Jour/Soir – Saint-Eustache - Groupe 5577 Taux horaire: Varie
As the global leader in high-speed connectivity, Ciena builds the critical infrastructure powering the AI era.We’re a technology company shaping the future of networking, guided by innovation, integrity, and collaboration.Through development opportunities, meaningful work, and flexibility,Ciena
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. The candidate will have the opportunity to work on many varieties of challenging designs, i.e. low
As the global leader in high-speed connectivity, Ciena builds the critical infrastructure powering the AI era.We’re a technology company shaping the future of networking, guided by innovation, integrity, and collaboration.Through development opportunities, meaningful work, and flexibility,Ciena
Company Information PACCAR is a Fortune 500 company established in 1905. PACCAR Inc is recognized as a global leader in the commercial vehicle, financial, and customer service fields with internationally recognized brands such as Kenworth, Peterbilt,
Desde PROMAN SPAIN, oficina de Mollet, buscamos incorporar un/a Técnico/a de laboratorio , para una empresa farmacéutica, ubicada en Montmeló (Barcelona). Todas las habilidades, cualificaciones y experiencia relevantes que necesitará un candidato seleccionado se enumeran en
Buscamos Account Executive para cubrir una baja de maternidad en VAIB — con vocación de quedarse. Desplácese hacia abajo para ver todos los requisitos del puesto y las responsabilidades que pueden esperar los candidatos seleccionados. En
Drive innovation in semiconductor design as a Senior ASIC Design Manager at Cognichip. Utilize AI to empower engineering teams and revolutionize chip design processes. Cognichip is seeking a Senior ASIC Design Manager to lead an exceptional
Altera is a leader in FPGA innovation, delivering programmable solutions that power AI, cloud computing, networking, and edge applications. Our compiler and tools teams are at the core of enabling customers to efficiently map complex designs
We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip
About Altera At Altera, our independence as the world’s largest pure‑play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry‑leading FPGA expertise, our singular